# Anechoic speeds Max-Cut trials on an FPGA

> Researchers at ETH Zurich and Yonsei University developed a parallel FPGA system for Max-Cut optimization. For the K2000 case, the paper gives a 99% target success-probability threshold for a 12-engine portfolio at a 0.05 ms round time.

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- Section: Technology
- Published: 2026-10-13T01:40:12+00:00
- Updated: 2026-10-13T01:40:12+00:00
- Source review period: 2026-10-09
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Anechoic applies a correction intended to reduce the return of a previous step’s influence when an Ising machine updates spins in parallel. The team implemented the algorithm as hand-written RTL engines on an AMD Alveo V80 FPGA and evaluated it on the fully connected, 2,000-node K2000 Max-Cut instance.

Twelve engines running at 250 MHz reached the paper’s TTS99 portfolio threshold for a cut of at least 33,000 on K2000 at a 0.05 ms round time. The paper estimates this probability from p=0.338 measured over 2,052 single trials; 99% is not an observed success rate across those trials. Energy was reported as 5.4 mJ per solution. The 22 nm ASIC results are estimates, not measurements from a manufactured chip.

## Data

### FPGA Max-Cut benchmark

Measurements are for the 2,000-node K2000 instance.

Methodology: Twelve engines at 250 MHz on an AMD Alveo V80 FPGA were tested for the time and probability of reaching a cut of at least 33,000 over 2,052 trials.

| Engine count | TTS99 probability threshold | Measurement scope |
|---|---|---|
| 12 | 99 | K2000; 12-engine portfolio, 0.05 ms round; 99% target threshold estimated from 2,052 single trials |

Sources: <https://arxiv.org/abs/2610.13368> · Download data: [JSON](https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026/data/fpga-benchmark?lang=en&format=json) · [CSV](https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026/data/fpga-benchmark?lang=en&format=csv)

## Sources

- [arXiv](<https://arxiv.org/abs/2610.13368>) (Source checked: 2026-10-13; Published: 2026-10-09)

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