{"article":{"annotation":{"article_id":"anechoic-fpga-maxcut-annealing-2026","available_at":"2026-10-13T01:40:17.316521Z","geography_revision":"ef6ee0010dda5fe7b240fd514749b43e214c57da73222d2e40ec83b276dd0977","id":"0f1f2553fa3132ed5860f1eed91456dab0bd8c815e5bf4620857e11f4be9a7c7","input_sha256":"5719b8069d7166ade61e1151e31bbeede190251981cf239ca5f6b76946d1bc3a","limitations":["Rule-derived subjects are candidates, not verified editorial labels or calibrated model probabilities.","Coverage is distinct from event location. Unknown country/city/coordinates remain absent; no automatic geocoding.","Article geometries keep their stated precision and methodology; reproducing them is not independent coordinate verification."],"method":"controlled-rules-v1","places":[],"rules_sha256":"fb5ad3c27c91cb840f7a0a05f7f64a5cb26ad0374409ff9457f277c7092e22b4","schema_version":1,"subjects":[{"concept_id":"medtop:13000000","confidence":null,"confidence_method":null,"evidence":[{"field":"category+topics","language":"en","note":"Preserved editorial category/topic; broad candidate only","source_urls":["https://arxiv.org/abs/2610.13368"]}],"method":"controlled-rules-v1","rule_id":"technology-broad","status":"candidate"}],"taxonomy_revision":"1f2db31d811fca07e99b16d402c10e2cc2965c9df1c7b41d9be348b40a24e7fb","taxonomy_version":"IPTC Media Topics 2026-Q2"},"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=es","category":"technology","content":{"key_points":[],"paragraphs":["Anechoic aplica una corrección destinada a reducir el retorno de la influencia del paso anterior cuando una máquina de Ising actualiza espines en paralelo. El equipo implementó el algoritmo en motores RTL escritos a mano en una FPGA AMD Alveo V80 y lo evaluó en el caso K2000 Max-Cut, completamente conectado y de 2.000 nodos.","Los doce motores a 250 MHz alcanzaron el umbral TTS99 de la cartera para un corte de al menos 33.000 en K2000 con un tiempo de ronda de 0,05 ms. El artículo estima esa probabilidad a partir de p=0,338 medido en 2.052 ensayos individuales; el 99 % no es la tasa de éxito observada en esos ensayos. La energía comunicada fue de 5,4 mJ por solución. Los resultados ASIC de 22 nm son estimaciones, no mediciones de un chip fabricado."],"sections":[]},"corrections":[],"country":null,"data":{"blocks":[{"columns":[{"key":"engine_count","label":{"ar":"عدد المحركات","de":"Anzahl der Engines","en":"Engine count","es":"Número de motores","fr":"Nombre de moteurs","pt":"Número de motores","tr":"Motor sayısı"},"type":"number","unit":"count"},{"key":"success_probability","label":{"ar":"عتبة احتمال TTS99","de":"TTS99-Wahrscheinlichkeitsschwelle","en":"TTS99 probability threshold","es":"Umbral de probabilidad TTS99","fr":"Seuil de probabilité TTS99","pt":"Limiar de probabilidade TTS99","tr":"TTS99 olasılık eşiği"},"type":"number","unit":"percent"},{"key":"result_scope","label":{"ar":"نطاق القياس","de":"Messumfang","en":"Measurement scope","es":"Alcance de la medición","fr":"Périmètre de la mesure","pt":"Âmbito da medição","tr":"Ölçüm kapsamı"},"language":"en","type":"text"}],"description":{"ar":"القياسات تخص مسألة K2000 ذات 2000 عقدة.","de":"Die Messungen beziehen sich auf die K2000-Instanz mit 2.000 Knoten.","en":"Measurements are for the 2,000-node K2000 instance.","es":"Las mediciones corresponden al caso K2000 de 2.000 nodos.","fr":"Les mesures concernent l’instance K2000 de 2 000 nœuds.","pt":"As medições referem-se à instância K2000 de 2.000 nós.","tr":"Ölçümler 2.000 düğümlü K2000 problemi içindir."},"id":"fpga-benchmark","methodology":{"ar":"اختُبر 12 محركاً بتردد 250 ميغاهرتز على FPGA من نوع AMD Alveo V80 لقياس زمن واحتمال بلوغ قيمة قطع لا تقل عن 33,000 عبر 2,052 تجربة.","de":"Zwölf Engines mit 250 MHz auf einem AMD-Alveo-V80-FPGA wurden in 2.052 Versuchen auf Zeit und Wahrscheinlichkeit für einen Cut von mindestens 33.000 getestet.","en":"Twelve engines at 250 MHz on an AMD Alveo V80 FPGA were tested for the time and probability of reaching a cut of at least 33,000 over 2,052 trials.","es":"Se probaron doce motores a 250 MHz en una FPGA AMD Alveo V80 para medir el tiempo y la probabilidad de alcanzar un corte de al menos 33.000 en 2.052 ensayos.","fr":"Douze moteurs à 250 MHz sur un FPGA AMD Alveo V80 ont été testés pour mesurer le temps et la probabilité d’atteindre une coupe d’au moins 33 000 sur 2 052 essais.","pt":"Doze motores a 250 MHz numa FPGA AMD Alveo V80 foram testados quanto ao tempo e à probabilidade de atingir um corte de pelo menos 33.000 em 2.052 ensaios.","tr":"AMD Alveo V80 FPGA’da 250 MHz’de çalışan 12 motorla, 2.052 deneme üzerinden en az 33.000 kesim değerine ulaşma olasılığı ve süresi ölçüldü."},"rowTranslations":[{"result_scope":{"ar":"K2000؛ محفظة 12 محركاً، جولة 0.05 ms؛ عتبة مستهدفة 99% مقدرة من 2,052 تجربة مفردة","de":"K2000; 12-Engine-Portfolio, 0,05-ms-Runde; 99-%-Zielschwelle aus 2.052 Einzelversuchen geschätzt","en":"K2000; 12-engine portfolio, 0.05 ms round; 99% target threshold estimated from 2,052 single trials","es":"K2000; cartera de 12 motores, ronda de 0,05 ms; umbral objetivo del 99 % estimado con 2.052 ensayos individuales","fr":"K2000; portefeuille de 12 moteurs, tour de 0,05 ms; seuil visé de 99 % estimé sur 2 052 essais individuels","pt":"K2000; portefólio de 12 motores, ronda de 0,05 ms; limiar-alvo de 99% estimado com 2.052 ensaios individuais","tr":"K2000; 12 motorlu portföy, 0,05 ms tur; 99% hedef eşiği, 2.052 tekli denemeden tahmin"}}],"rows":[{"engine_count":12,"result_scope":"K2000; 12-engine portfolio, 0.05 ms round; 99% target threshold estimated from 2,052 single trials","success_probability":99}],"sourceUrls":["https://arxiv.org/abs/2610.13368"],"title":{"ar":"اختبار Max-Cut على FPGA","de":"FPGA-Max-Cut-Benchmark","en":"FPGA Max-Cut benchmark","es":"Prueba Max-Cut en FPGA","fr":"Test Max-Cut sur FPGA","pt":"Teste Max-Cut em FPGA","tr":"FPGA Max-Cut kıyaslaması"},"type":"table","updatedAt":"2026-10-13T01:31:44Z"}],"version":1},"data_downloads":[{"formats":{"csv":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026/data/fpga-benchmark?lang=es&format=csv","json":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026/data/fpga-benchmark?lang=es&format=json"},"id":"fpga-benchmark"}],"data_types":["table"],"editorial_illustration":{"alt":"Ilustración conceptual de tecnología, procesadores e información conectada.","asset_id":"newsverum-v1-technology","avif_variants":[{"height":320,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-480.avif","width":480},{"height":480,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-720.avif","width":720},{"height":640,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-960.avif","width":960},{"height":800,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1200.avif","width":1200},{"height":1024,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1536.avif","width":1536}],"credit":"Newsverum","documentary":false,"height":1024,"kind":"symbolic-editorial-illustration","language":"es","scope":"topic","url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1536.webp","variants":[{"height":320,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-480.webp","width":480},{"height":640,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-960.webp","width":960},{"height":1024,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1536.webp","width":1536}],"width":1536},"event_id":"event-357c5c34-c956-5fa4-9c8e-318634a2ad22","event_period":"2026-10-09","event_period_basis":"source-review","id":"anechoic-fpga-maxcut-annealing-2026","image":null,"importance":0.6,"language":"es","modified_at":"2026-10-13T01:40:12+00:00","publication_basis":"publication-record","published_at":"2026-10-13T01:40:12+00:00","reading_minutes":1,"region":"world","relations":[],"section_illustration":{"alt":"Ilustración conceptual de tecnología, procesadores e información conectada.","asset_id":"newsverum-v1-technology","avif_variants":[{"height":320,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-480.avif","width":480},{"height":480,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-720.avif","width":720},{"height":640,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-960.avif","width":960},{"height":800,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1200.avif","width":1200},{"height":1024,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1536.avif","width":1536}],"credit":"Newsverum","documentary":false,"height":1024,"kind":"symbolic-editorial-illustration","language":"es","scope":"section","url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1536.webp","variants":[{"height":320,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-480.webp","width":480},{"height":640,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-960.webp","width":960},{"height":1024,"url":"https://newsverum.com/assets/newsverum/illustrations/v1/technology-1536.webp","width":1536}],"width":1536},"slug":"anechoic-fpga-maxcut-annealing-2026","sources":[{"checkedAt":"2026-10-13","name":"arXiv","publishedAt":"2026-10-09","url":"https://arxiv.org/abs/2610.13368"}],"summary":"Investigadores de ETH Zúrich y la Universidad Yonsei desarrollaron un sistema FPGA paralelo para optimización Max-Cut. Para el caso K2000, el artículo da un umbral de probabilidad de éxito objetivo del 99 % para una cartera de 12 motores con un tiempo de ronda de 0,05 ms.","text":"Investigadores de ETH Zúrich y la Universidad Yonsei desarrollaron un sistema FPGA paralelo para optimización Max-Cut. Para el caso K2000, el artículo da un umbral de probabilidad de éxito objetivo del 99 % para una cartera de 12 motores con un tiempo de ronda de 0,05 ms.\n\nAnechoic aplica una corrección destinada a reducir el retorno de la influencia del paso anterior cuando una máquina de Ising actualiza espines en paralelo. El equipo implementó el algoritmo en motores RTL escritos a mano en una FPGA AMD Alveo V80 y lo evaluó en el caso K2000 Max-Cut, completamente conectado y de 2.000 nodos.\n\nLos doce motores a 250 MHz alcanzaron el umbral TTS99 de la cartera para un corte de al menos 33.000 en K2000 con un tiempo de ronda de 0,05 ms. El artículo estima esa probabilidad a partir de p=0,338 medido en 2.052 ensayos individuales; el 99 % no es la tasa de éxito observada en esos ensayos. La energía comunicada fue de 5,4 mJ por solución. Los resultados ASIC de 22 nm son estimaciones, no mediciones de un chip fabricado.","title":"Anechoic acelera las pruebas Max-Cut en una FPGA","topics":[],"translations":[{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=tr","language":"tr","url":"https://newsverum.com/tr/news/anechoic-fpga-maxcut-annealing-2026"},{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=en","language":"en","url":"https://newsverum.com/en/news/anechoic-fpga-maxcut-annealing-2026"},{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=ar","language":"ar","url":"https://newsverum.com/ar/news/anechoic-fpga-maxcut-annealing-2026"},{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=fr","language":"fr","url":"https://newsverum.com/fr/news/anechoic-fpga-maxcut-annealing-2026"},{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=es","language":"es","url":"https://newsverum.com/es/news/anechoic-fpga-maxcut-annealing-2026"},{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=de","language":"de","url":"https://newsverum.com/de/news/anechoic-fpga-maxcut-annealing-2026"},{"api_url":"https://newsverum.com/api/v1/articles/anechoic-fpga-maxcut-annealing-2026?lang=pt","language":"pt","url":"https://newsverum.com/pt/news/anechoic-fpga-maxcut-annealing-2026"}],"url":"https://newsverum.com/es/news/anechoic-fpga-maxcut-annealing-2026"},"version":"1"}